Design and Verification of Distributed Recovery Blocks with CSP

Authors:
W. L. Yeung;S. A. Schneider
Affiliations:
Lingnan University, Hong Kong, People's Republic of China. wlyeung@ln.edu.hk;Royal Holloway, University of London, Egham, Surrey, TW20 0EX, UK. s.schneider@cs.rhul.ac.uk
Venue:
Formal Methods in System Design
Year:
2003

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Abstract

In the study of asynchronous designs most authors use the interleaving model of concurrency when describing the behavior of a network; this is usually done for simplicity. The interleaving model assumes the behavior of an asynchronous circuit can ...