On hierarchical design of computer systems for critical applications
IEEE Transactions on Software Engineering - Special issue on reliability and safety in real-time process control
Systematic software development using VDM
Systematic software development using VDM
Formal Verification of Fault Tolerance Using Theorem-Proving Techniques
IEEE Transactions on Computers
The notion of proof in hardware verification
Journal of Automated Reasoning
Verifying General Safety Properties of Ada Tasking Programs
IEEE Transactions on Software Engineering
Evaluation of safety-critical software
Communications of the ACM
A Protocol Modeling and Verification Approach Based on a Specification Language and Petri Nets
IEEE Transactions on Software Engineering
Programming language concepts and paradigms
Programming language concepts and paradigms
A Design Approach for Ultrareliable Real-Time Systems
Computer - Special issue on real-time systems
High-level Petri nets: theory and application
High-level Petri nets: theory and application
IEEE Transactions on Software Engineering
An introduction to formal specification and Z
An introduction to formal specification and Z
Compositional specification and verification of distributed systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
IEEE Spectrum
A lattice model of secure information flow
Communications of the ACM
Security Kernel validation in practice
Communications of the ACM
Introduction to Mathematical Theory of Computation
Introduction to Mathematical Theory of Computation
Automated Reasoning: Introduction and Applications
Automated Reasoning: Introduction and Applications
Formal Verification of Algorithms for Critical Systems
IEEE Transactions on Software Engineering
Formal design verification of digital systems
DAC '83 Proceedings of the 20th Design Automation Conference
A formal design verification system based on an automated reasoning system
DAC '84 Proceedings of the 21st Design Automation Conference
Design and verification of secure systems
SOSP '81 Proceedings of the eighth ACM symposium on Operating systems principles
A General Theory of Composition for Trace Sets Closed under Selective Interleaving Functions
SP '94 Proceedings of the 1994 IEEE Symposium on Security and Privacy
Formal Design and Verification of a Reliable Computing Platform for Real-Time Control (Phase 1 Results)
Formal verification of digital systems (hierarchical modeling, petri nets, verification, rule-based)
Formal verification of digital systems (hierarchical modeling, petri nets, verification, rule-based)
Design and Verification of Distributed Recovery Blocks with CSP
Formal Methods in System Design
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This paper describes work that represents the culmination of a comprehensive hardware/software modeling and analysis project concerning the Charles Stark Draper Laboratory Fault-Tolerant Processor (FTP). The FTP performs a safety-related function at the Integral Fast Reactor (IFR previously known as the Experimental Breeder Reactor-II) operated by Argonne National Laboratory for the Department of Energy. Previously, we demonstrated the tolerance to hardware failures of data exchange instructions on the FTP. Here, we describe a methodology for assuring that the software executing on the FTP is also tolerant to hardware failures. This methodology is based on an abstraction of the program data and control flows in terms of the specification of an abstract application program that operates on the FTP. We then prove the fault tolerance of the abstract application program to hardware and sensor failures. Based on a more detailed specification and analysis of the code that is used in the application software, we demonstrate that this code satisfies the sufficient conditions developed for the abstract application program to claim system fault tolerance.