Conservative Circuit Simulation on Multiprocessor Machines

  • Authors:
  • Azzedine Boukerche

  • Affiliations:
  • -

  • Venue:
  • HiPC '00 Proceedings of the 7th International Conference on High Performance Computing
  • Year:
  • 2000

Quantified Score

Hi-index 0.00

Visualization

Abstract

Distributed computation among multiple processors is one approach to reducing simulation time for large VLSI circuits designs. In this paper, we investigate conservative parallel discrete event simulation for logic circuits on multiprocessor machines. The synchronization protocol makes use of the Semi-Global Time-of-Next- Event (SGTNE/TNE) suite of algorithms. Extensive simulation experiments were conducted to validate our model using several digital logic circuits on an Intel Paragon machine.