Lower bound estimation of hardware resources for scheduling in high-level synthesis
Journal of Computer Science and Technology
Optimal vs. heuristic integrated code generation for clustered VLIW architectures
SCOPES '08 Proceedings of the 11th international workshop on Software & compilers for embedded systems
Integrated Modulo Scheduling for Clustered VLIW Architectures
HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
A unified approach for scheduling and allocation
Integration, the VLSI Journal
Integrated Code Generation for Loops
ACM Transactions on Embedded Computing Systems (TECS)
Share with care: a quantitative evaluation of sharing approaches in high-level synthesis
Proceedings of the Conference on Design, Automation and Test in Europe
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