Formal verification and analysis of multimedia systems
MULTIMEDIA '99 Proceedings of the seventh ACM international conference on Multimedia (Part 1)
Formal verification of an IBM CoreConnect processor local bus arbiter core
Proceedings of the 37th Annual Design Automation Conference
Selective Quantitative Analysis and Interval Model Checking: Verifying Different Facets of a System
Formal Methods in System Design
Compositional Reasoning in Model Checking
COMPOS'97 Revised Lectures from the International Symposium on Compositionality: The Significant Difference
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
BUSpec: A framework for generation of verification aids for standard bus protocol specifications
Integration, the VLSI Journal
Verification of AMBA Using a Combination of Model Checking and Theorem Proving
Electronic Notes in Theoretical Computer Science (ENTCS)
Methods to tackle state explosion problem in model checking
IITA'09 Proceedings of the 3rd international conference on Intelligent information technology application
Symbolic model checking in practice
SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
Comparing learning algorithms in automated assume-guarantee reasoning
ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part I
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Symbolic model checking is a successful technique for checking properties of large finite-state systems. This method has been used to verify a number of real-world hardware designs; however it is not able to determine timing or performance properties directly. Since these properties are extremely important in the design of high-performance systems and in time-critical applications, we have extended model checking techniques to produce timing information. Our results allow a more detailed analysis of a model than is possible with tools that simply determine whether a property is satisfied or not. We present algorithms that determine the exact bounds on the time interval between two specified events and the number of occurrences of another event in such an interval. To demonstrate how our method works, we have modelled the PCI local bus and analyzed its temporal behavior. The results demonstrate the usefulness of our technique in analyzing complex modem designs.