Automatic translation of software binaries onto FPGAs
Proceedings of the 41st annual Design Automation Conference
Instruction Set Emulation for Rapid Prototyping of SoCs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Automatic extraction of function bodies from software binaries
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
An overview of a compiler for mapping software binaries to hardware
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Towards device emulation code generation
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
DisIRer: Converting a retargetable compiler into a multiplatform binary translator
ACM Transactions on Architecture and Code Optimization (TACO)
Generation of control and data flow graphs from scheduled and pipelined assembly code
LCPC'05 Proceedings of the 18th international conference on Languages and Compilers for Parallel Computing
LLBT: an LLVM-based static binary translator
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
Fast simulation of systems embedding VLIW processors
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Formal virtualization requirements for the ARM architecture
Journal of Systems Architecture: the EUROMICRO Journal
Boosting CUDA Applications with CPU---GPU Hybrid Computing
International Journal of Parallel Programming
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The porting of software to newer and faster machines using static binary translation techniques has proved successful to a large extent. Current binary translators are static in nature and require a runtime environment to successfully support the execution of the translated programs on the new machine. On the other hand, dynamic binary translation has not been considered as an alternative to static translation -- we argue that these translators can achieve at least the same performance as static translators but will require a simpler runtime environment. This paper presents techniques used to migrate legacy software running on register-based machines of the last 10 to 15years to modern RISC machines. We have developed a second-generation disassembler to aid in the construction of a retargetable binary translation front-end. Retargetability of binary translators is an issue that has not been addressed in present translators.