An efficient, fully adaptive deadlock recovery scheme: DISHA
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Dynamically Configurable Message Flow Control for Fault-Tolerant Routing
IEEE Transactions on Parallel and Distributed Systems
Flexible and Efficient Routing Based on Progressive Deadlock Recovery
IEEE Transactions on Computers
Asynchronous Tree-Based Multicasting in Wormhole-Switched MINs
IEEE Transactions on Parallel and Distributed Systems
A General Theory for Deadlock-Free Adaptive Routing Using a Mixed Set of Resources
IEEE Transactions on Parallel and Distributed Systems
A Cost-Effective Approach to Deadlock Handling in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Software-Based Deadlock Recovery Technique for True Fully Adaptive Routing in Wormhole Networks
ICPP '97 Proceedings of the international Conference on Parallel Processing
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
Performance Analysis of Minimal Adaptive Wormhole Routing with Time-Dependent Deadlock Recovery
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
A deadlock detection mechanism for true fully adaptive routing in regular wormhole networks
Computer Communications
CTC: An end-to-end flow control protocol for multi-core systems-on-chip
NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
The connection-then-credit flow control protocol for heterogeneous multicore systems-on-chip
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
Routing to support communication in dependable networks
EUROMICRO-PDP'02 Proceedings of the 10th Euromicro conference on Parallel, distributed and network-based processing
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This paper presents a simple method of implementing an efficient and cost effective routing scheme. The strategy considers deadlock recovery as opposed to prevention to optimize performance in the absence of deadlocks. Cycles are broken by re-routing a blocked packet through a deadlock-free lane which is implemented as a central "floating" buffer. The proposed scheme is extremely simple, ensuring quick recovery from deadlocks and enabling the design of fast routers.