Partial evaluation and automatic program generation
Partial evaluation and automatic program generation
Improving functional density through run-time constant propagation
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
A case study of partially evaluated hardware circuits: Key-specific DES
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Architectural descriptions for FPGA circuits
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Computer
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The preliminary results of dynamically specialising Xilinx XC6200 FPGA circuits using partial evaluation are presented. This method provides a systematic way to manage to complexity of dynamic reconfiguration in the special case where a general circuit is specialised with respect to one input which changes more slowly than the other inputs.