FIR filters with field-programmable gate arrays
Journal of VLSI Signal Processing Systems - Special issue on field-programmable gate arrays
Artificial Neural Network Implementation on a Fine-Grained FPGA
FPL '94 Proceedings of the 4th International Workshop on Field-Programmable Logic and Applications: Field-Programmable Logic, Architectures, Synthesis and Applications
Implementation Approaches for Reconfigurable Logic Applications
FPL '95 Proceedings of the 5th International Workshop on Field-Programmable Logic and Applications
Design methodologies for partially reconfigured systems
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Run time reconfiguration of FPGA for scanning genomic databases
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Reconfigurable architectures for general-purpose computing
Reconfigurable architectures for general-purpose computing
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Factoring large numbers with programmable hardware
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
Quantitative Analysis of FPGA-based Database Searching
Journal of VLSI Signal Processing Systems
Formally Analyzed Dynamic Synthesis of Hardware
The Journal of Supercomputing
Partial Evaluation of Hardware
Partial Evaluation - Practice and Theory, DIKU 1998 International Summer School
A n-Bit Reconfigurable Scalar Quantiser
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Pipeline Vectorization for Reconfigurable Systems
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Implementation of Multipliers in FPGA Structures
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey
Journal of VLSI Signal Processing Systems
Run-time reconfigurable systems for digital signal processing applications: a survey
Journal of VLSI Signal Processing Systems
Infrastructure for dynamic reconfigurable systems: choices and trade-offs
SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
Mapping data-parallel tasks onto partially reconfigurable hybrid processor architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Logarithmic-Time FPGA Bitstream Analysis: A Step Towards JIT Hardware Compilation
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
High-performance automatic target recognition through data-specific VLSI
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Dynamic data folding with parameterizable FPGA configurations
ACM Transactions on Design Automation of Electronic Systems (TODAES)
How to efficiently implement dynamic circuit specialization systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Circuit specialization techniques such as constant propagation are commonly used to reduce both the hardware resources and cycle time of digital circuits. When reconfigurable FPGAs are used, these advantages can be extended by dynamically specializing circuits using run-time reconfiguration (RTR). For systems exploiting constant propagation, hardware resources can be reduced by folding constants within the circuit and dynamically changing the constants using circuit reconfiguration. To measure the benefits of circuit specialization, a functional density metric is presented. This metric allows the analysis of both static and run-time reconfigured circuits by including the cost of circuit reconfiguration. This metric will be used to justify runtime constant propagation as well as analyze the effects of reconfiguration time on run-time reconfigured systems.