FPGA-based sonar processing

  • Authors:
  • Paul Graham;Brent Nelson

  • Affiliations:
  • Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT;Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT

  • Venue:
  • FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
  • Year:
  • 1998

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Abstract

This paper presents the application of time-delay sonar beamforming and discusses a multi-board FPGA system for performing several variations of this beamforming method in real-time for realistic sonar arrays. Additionally, we show that our proposed FPGA system has a six to twelve times performance advantage over an equivalent system created using currently available, high-performance DSPs designed for multiprocessing systems. This performance advantage is due to the simplicity of the core calculation, the limitations of the the DSP's address calculation hardware, and the ability to customize the I/O of the FPGA to the application.