Overview of the power minimization techniques employed in the IBM PowerPC 4xx embedded controllers
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
A CAD Suite for High-Performance FPGA Design
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A Reconfigurable Embedded Input Device for Kinetically Challenged Persons
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
The case for reconfigurable hardware in wearable computing
Personal and Ubiquitous Computing
Journal of VLSI Signal Processing Systems
Microprocessors & Microsystems
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Microsensor systems are described that support reconnaissance, surveillance and target acquisition (RSTA) operations. Since communication bandwidth on a microsensor is limited by the power constraints imposed by desired sensor lifespan, the amount of data that can be transmitted is minimal. Therefore, much of the signal processing needed to implement the desired functionality must be performed within the aggressive size, power and weight constraints of the microsensor itself. Furthermore, it is desired that these microsensors be inexpensive and have a very small logistics tail. In order to make the solution inexpensive, it is asserted that a common and open architecture for microsensors should be developed so that a wide range of sensor heads can be seamlessly interchanged utilizing a common piece of hardware. This not only allows the development cost to be shared among the widest possible range of applications but results in a generic sensor processor that can be configured at time of deployment. This paper describes a computing architecture developed by Sanders, which employs FPGA technology married with a general-purpose processor. In addition, this effort has demonstrated the applicability of FPGA technology to a widespread DoD application space and shown it to be a technology discriminator for future microsensor systems. The motivation for this common architecture for microsensors (CAPS), the CapS architecture, the baseline acoustic algorithm implemented, and the results of the fielded system, which achieved more than four orders of magnitude reduction in size*weight*power over the ARL DUNES testbed, are discussed. Future work is also described.