GigaOp DSP on FPGA

  • Authors:
  • Brad L. Hutchings;Brent E. Nelson

  • Affiliations:
  • Brigham Young University, Department of Electrical and Computer Engineering, 459 CB, Provo, UT 84602, USA;Brigham Young University, Department of Electrical and Computer Engineering, 459 CB, Provo, UT 84602, USA

  • Venue:
  • Journal of VLSI Signal Processing Systems
  • Year:
  • 2004

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Abstract

DSP algorithms such as automated target recognition and SONAR beamforming are a good match for FPGA technology due to their regular structure, available parallelism, pipeline-ability, and modest data word sizes. FPGA implementations of these applications outperformed their DSP and microprocessor counterparts by factors ranging from 10× on up with an equivalent sustained computational rate of more than 2 GOps/second per FPGA. This paper introduces a set of criteria which have a great impact on how well an application maps to FPGA technology. It then describes two applications in detail and the process of mapping each to FPGA technology. Comparisons with software implementations are made and followed by conclusions and future challenges.