Programmable active memories: reconfigurable systems come of age
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A reconfigurable arithmetic array for multimedia applications
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
PAM-Blox: High Performance FPGA Design for Adaptive Computing
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
Object Oriented Circuit-Generators in Java
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
JHDL - An HDL for Reconfigurable Systems
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
The Transmogrifier C hardware description language and compiler for FPGAs
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
A C++ compiler for FPGA custom execution units synthesis
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Automatic Generation of Digital System Schematic Diagrams
IEEE Design & Test
Using general-purpose programming languages for FPGA design
Proceedings of the 37th Annual Design Automation Conference
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
IP delivery for FPGAs using Applets and JHDL
Proceedings of the 39th annual Design Automation Conference
Designing Run-Time Reconfigurable Systems with JHDL
Journal of VLSI Signal Processing Systems
Towards a general framework for FPGA based image processing using hardware skeletons
Parallel Computing - Parallel computing in image and video processing
Designing and Debugging Custom Computing Applications
IEEE Design & Test
StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Reconfigurable Breakpoints for Co-debug
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
A Generic Library for Adaptive Computing Environments
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Efficient Constant Coefficient Multiplication Using Advanced FPGA Architectures
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
A Prolog-Based Hardware Development Environment
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Novel Optimizations for Hardware Floating-Point Units in a Modern FPGA Architecture
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Synthesizing RTL Hardware from Java Byte Codes
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Interface specification for reconfigurable components
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
A Run-Time Reconfigurable Plug-In for the Winamp MP3 Player
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
A Reconfigurable Computing Architecture for Microsensors
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Journal of VLSI Signal Processing Systems
From application descriptions to hardware in seconds: a logic-based approach to bridging the gap
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey
Journal of VLSI Signal Processing Systems
High-Visibility Debug-By-Design for FPGA Platforms
The Journal of Supercomputing
A Hardware Acceleration Unit for MPI Queue Processing
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
Embedded floating-point units in FPGAs
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Issues in debugging highly parallel FPGA-based applications derived from source code
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Scan-chain based watch-points for efficient run-time debugging and verification of FPGA designs
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Run-time reconfigurable systems for digital signal processing applications: a survey
Journal of VLSI Signal Processing Systems
The use of configurable computing for computational kernels in scientific simulations
Future Generation Computer Systems
Efficient FPGA hardware development: A multi-language approach
Journal of Systems Architecture: the EUROMICRO Journal
Architectural modifications to enhance the floating-point performance of FPGAs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design, Debug, Deploy: The Creation of Configurable Computing Applications
Journal of Signal Processing Systems
Floating-point divider design for FPGAs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
The use of configurable computing for computational kernels in scientific simulations
Future Generation Computer Systems
Fast, Efficient Floating-Point Adders and Multipliers for FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
MDE-based FPGA physical design: fast model-driven prototyping with Smalltalk
Proceedings of the International Workshop on Smalltalk Technologies
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This paper describes the current status of a suite of CAD tools designed specifically for use by designers who are developing high-performance configurable-computing applications. Implemented in Java, these tools are based on an embedded design language referred to as JHDL that allows designers to write Java programs that generate digital circuits. The JHDL suite includes: (1) a graphical debugging tool that allows designers to simulate, debug and hierarchically navigate their designs, (2) a schematic generator that can automatically create a high-quality schematic view of a JHDL description, (3) an EDIF 2.0 netlist class that generates output compatible with current Xilinx M1 place and route software, (4) simulation models and transparent run-time support for the Annapolis Microsystems WildForce platform, and (5) a graphical floorplanner (under development) that will be used cooperatively with the schematic view to manually floor-plan designs. JHDL provides a unified design environment where a single, user interface can be used for both simulation and execution.This allows the designer to request either simulation or execution (or a mixture of the two) using the exact same commands for both. This is a big advantage for designers because they can learn a single debugging environment that works for both simulation and execution --in contrast with current systems where execution and simulation environments are distinct and very different. JHDL is currently being used to design several complex applications in image processing and signal processing.