Field programmable port extender (FPX) for distributed routing and queuing
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
AMBA: Enabling Reusable On-Chip Designs
IEEE Micro
UltraSONIC: A Reconfigurable Architecture for Video Image Processing
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Systems performance measurement on PCI Pamette
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Architectures for System-Level Applications of Adaptive Computing
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A CAD Suite for High-Performance FPGA Design
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Instrumenting Bitstreams for Debugging FPGA Circuits
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Applications of adaptive computing systems for signal processing challenges
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Visions for application development on hybrid computing systems
Parallel Computing
| Hi-index | 0.00 |
The true measure of a general-purpose FPGA platform is user design productivity, not just raw hardware performance. User productivity is a function of several interdependent components of the design environment: system firmware, simulation models, debugging support, device drivers, APIs and so forth. The careful, coordinated design of these components determines the level of debugging visibility and, ultimately, the ease of development for the end user. This paper examines the innovative aspects of the development of the SLAAC FPGA platforms and programming environment. Several novel techniques are presented, including circuit designs for transparent clock stepping and host access to on-board memories; device driver strategies and a "register compiler" to ease the design and testing of the hardware-software interface; and a co-simulation approach for advanced debugging of firmware, device drivers and user applications.