UltraSONIC: A Reconfigurable Architecture for Video Image Processing

  • Authors:
  • Simon D. Haynes;Henry G. Epsom;Richard J. Cooper;Paul L. McAlpine

  • Affiliations:
  • -;-;-;-

  • Venue:
  • FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
  • Year:
  • 2002

Quantified Score

Hi-index 0.00

Visualization

Abstract

The UltraSONIC architecture enables rapid development of video processing solutions. This is achieved through a flexible architecture that is tailored for real-time standard and high definition video image processing. This paper shows how solutions for new applications can be implemented quickly using hardware based on reconfigurable logic. We also explain how the software interface abstracts the hardware to simplify hardware/software co-design, permitting parallel development of hardware and software. Dynamic reconfiguration is exploited by the UltraSONIC architecture to allow applications to share hardware resources. A novel method for abstracting the reconfigurable designs from the system level hardware allows the same design to be used for real-time processing and off-line software acceleration. We demonstrate how the UltraSONIC architecture has benefited Sony Broadcast & Professional Research Labs through several examples including: real-time encryption of video, compressed video capture and play-back from a computer, and MPEG Compression/Decompression.