Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
NAPA C: Compiling for a Hybrid RISC/FPGA Architecture
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
Accelerating Adobe Photoshop with the Reconfigurable Logic
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
Reconfigurable Computing for Augmented Reality
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Pipeline Vectorization for Reconfigurable Systems
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
WILDFIRE(tm) Heterogeneous Adaptive Parallel Processing Systems
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
Heuristic datapath allocation for multiple wordlength systems
Proceedings of the conference on Design, automation and test in Europe
Configuring of Algorithms in Mapping into Hardware
The Journal of Supercomputing
Journal of VLSI Signal Processing Systems
Static and Dynamic Reconfigurable Designs for a 2D Shape-Adaptive DCT
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
DARP - A Digital Audio Reconfigurable Processor
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Rijndael Cryptographic Engine on the UltraSONIC Reconfigurable Platform
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
HAGAR: Efficient Multi-context Graph Processors
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
UltraSONIC: A Reconfigurable Architecture for Video Image Processing
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Image Registration of Real-Time Broadcast Video Using the UltraSONIC Reconfigurable Computer
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
Reconfigurable platforms for ubiquitous computing
Proceedings of the 1st conference on Computing frontiers
CODACS Prototype: A Platform-Processor for CHIARA Programs
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 13 - Volume 14
Optimum and heuristic synthesis of multiple word-length architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Run-time integration of reconfigurable video processing systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The Instruction-Set Extension Problem: A Survey
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Architecture and operating system support for two-dimensional runtime partial reconfiguration
The Journal of Supercomputing
CODACS project: a development tool for embedded system prototyping
ICESS'04 Proceedings of the First international conference on Embedded Software and Systems
Robust Software Partitioning with Multiple Instantiation
INFORMS Journal on Computing
| Hi-index | 4.10 |
Current industrial video-processing systems use a mixture of high-performance workstations and application-specific integrated circuits. However, video image processing in the professional broadcast environment requires more computational power and data throughput than most of today's general-purpose computers can provide. In addition, using ASICs for video image processing is both inflexible and expensive.Configurable computing offers an appropriate alternative for broadcast video image editing and manipulation by combining the flexibility, programmability, and economy of general-purpose processors with the performance of dedicated ASICs.Sonic is a configurable computing system that performs real-time video image processing. The authors describe how it implements algorithms for two-dimensional linear transforms, fractal image generation, filters, and other video effects. Sonic's flexible and scalable architecture contains configurable processing elements that accelerate software applications and support the use of plug-in software.