Using general-purpose programming languages for FPGA design

  • Authors:
  • Brad L. Hutchings;Brent E. Nelson

  • Affiliations:
  • Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT;Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT

  • Venue:
  • Proceedings of the 37th Annual Design Automation Conference
  • Year:
  • 2000

Quantified Score

Hi-index 0.00

Visualization

Abstract

General-purpose programming languages (GPL) are effective vehicles for FPGA design because they are easy to use, extensible, widely available, and can be used to describe both the hardware and software aspects of a design. The strengths of the GPL approach to circuit design have been demonstrated by JHDL, a Java-based circuit design environment used to develop several large FPGA-based applications at several institutions. Major strengths of the JHDL environment include a common run-time for both simulation and hardware execution, and the overall extensibility of the parent Java environment. The common run-time environment means that all validation and support software (testbenches, application-specific interfaces, graphical user interfaces, etc.) can be used without modification with the built-in simulator or with the executing application as it runs in hardware. Extensibility also plays a big role because designers can easily add new capability to the environment by writing additional tools in the parent language, Java, using the wide variety of available libraries. This paper gives a brief introduction to JHDL syntax and demonstrates its features with an end-to-end application example.