Highly concurrent scalar processing
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Memory access buffering in multiprocessors
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Characterization of branch and data dependencies on programs for evaluating pipeline performance
IEEE Transactions on Computers
Measurement and evaluation of the MIPS architecture and processor
ACM Transactions on Computer Systems (TOCS)
The IBM System/370 Vector Architecture: Design Considerations
IEEE Transactions on Computers
Operation scheduling in reconfigurable, multifunction pipelines
ACM SIGMICRO Newsletter
A processor architecture for horizon
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
An efficient pipelined dataflow processor architecture
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
Extended microcode error checking on a pipelined machine
MICRO 22 Proceedings of the 22nd annual workshop on Microprogramming and microarchitecture
Reconfigurable Multipipelines for Vector Supercomputers
IEEE Transactions on Computers
On the Complexity of Scheduling Problems for Parallel/Pipelined Machines
IEEE Transactions on Computers
Test Scheduling in High Performance VLSI System Implementations
IEEE Transactions on Computers
Synthesis of pipelined instruction set processors
DAC '93 Proceedings of the 30th international Design Automation Conference
Effects of memory latencies on non-blocking processor/cache architectures
ICS '93 Proceedings of the 7th international conference on Supercomputing
Generating instruction sets and microarchitectures from applications
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Synthesis of instruction sets for pipelined microprocessors
DAC '94 Proceedings of the 31st annual Design Automation Conference
A tool for processor instruction set design
EURO-DAC '94 Proceedings of the conference on European design automation
Scheduling and mapping: software pipelining in the presence of structural hazards
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Strategic directions in computer architecture
ACM Computing Surveys (CSUR) - Special ACM 50th-anniversary issue: strategic directions in computing research
Holistic design of a programming system
ACM SIGSOFT Software Engineering Notes
Memory access buffering in multiprocessors
25 years of the international symposia on Computer architecture (selected papers)
IMPACT: an architectural framework for multiple-instruction-issue processors
25 years of the international symposia on Computer architecture (selected papers)
Using precomputation in architecture and logic resynthesis
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Overview of a high-performance programmable pipeline structure
ICS '89 Proceedings of the 3rd international conference on Supercomputing
A 32-bit CMOS microprocessor with six-stage pipeline structure
ACM '86 Proceedings of 1986 ACM Fall joint computer conference
Formal Methods in System Design
Enhanced Co-Scheduling: A Software Pipelining Method Using Modulo-Scheduled Pipeline Theory
International Journal of Parallel Programming
Optimization of Machine Descriptions for Efficient Use
International Journal of Parallel Programming
A Multiple-Access Pipeline Architecture for Digital Signal Processing
IEEE Transactions on Computers
Interrupt Handling for Out-of-Order Execution Processors
IEEE Transactions on Computers
Branch Target Buffer Design and Optimization
IEEE Transactions on Computers
IEEE Transactions on Computers
High-Performance 3-1 Interlock Collapsing ALU's
IEEE Transactions on Computers
Clocking Arbitrarily Large Computing Structures Under Constant Skew Bound
IEEE Transactions on Parallel and Distributed Systems
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Optimizing pipelines for power and performance
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
RTGEN: an algorithm for automatic generation of reservation tables from architectural descriptions
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Journal of VLSI Signal Processing Systems
Biologically inspired rule-based multiset programming paradigm for soft-computing
Proceedings of the 1st conference on Computing frontiers
J-map for quantum dot cellular automata
AEE'08 Proceedings of the 7th WSEAS International Conference on Application of Electrical Engineering
J-map for quantum dot cellular automata
ISCGAV'08 Proceedings of the 8th conference on Signal processing, computational geometry and artificial vision
Policies of System Level Pipeline Modeling
Electronic Notes in Theoretical Computer Science (ENTCS)
The IBM System/370 vector architecture
IBM Systems Journal
Integration of machine organization and control program design: review and direction
IBM Journal of Research and Development
Proof of correctness of high-performance 3-1 interlock collapsing ALUs
IBM Journal of Research and Development
Performance evaluation of vector implementations of combinatorial algorithms
Parallel Computing
Design of a pipelined datapath synthesis system for digital signal processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hi-index | 0.03 |
From the Publisher:Written by a leading researcher/designer in the field,this book focuses on the design and implementation of two classes of non-Von Neumann computer architectures: for Functional (such as LISP) and Logical (such as Prolog) language computing. This represents one of the biggest steps in computer design in forty years.