Synthesis: an efficient implementation of fundamental operating system services
Synthesis: an efficient implementation of fundamental operating system services
Implementation of the data encryption standard algorithm with FPGAs
Selected papers from the Oxford 1993 international workshop on field programmable logic and applications on More FPGAs
A high-performance microarchitecture with hardware-programmable functional units
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
DCG: an efficient, retargetable dynamic code generation system
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Optimizing ML with run-time code generation
PLDI '96 Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation
Improving functional density through run-time constant propagation
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
A case study of partially evaluated hardware circuits: Key-specific DES
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Image Processing on a Custom Computing Platform
FPL '94 Proceedings of the 4th International Workshop on Field-Programmable Logic and Applications: Field-Programmable Logic, Architectures, Synthesis and Applications
Issues in wireless video coding using run-time-reconfigurable FPGAs
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Organization of computer systems: the fixed plus variable structure computer
IRE-AIEE-ACM '60 (Western) Papers presented at the May 3-5, 1960, western joint IRE-AIEE-ACM computer conference
Factoring large numbers with programmable hardware
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
MorphoSys: case study of a reconfigurable computing system targeting multimedia applications
Proceedings of the 37th Annual Design Automation Conference
IEEE Transactions on Computers
Mapping of generalized template matching onto reconfigurable computers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
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Under the Mojave configurable computing project, we have developed a system for achieving high performance on an automatic target recognition (ATR) application through the use of configurable computing technology. The ATR system studied here involves real-time image acquisition from a synthetic aperture radar (SAR). SAR images exhibit statistical properties which can be used to improve system performance. In this paper, the Mojave configurable computing system uses field programmable gate arrays (FPGA's) to implement highly specialized circuits while retaining the flexibility of programmable components. A controller sequences through a set of specialized circuits in response to real-time events. Computer-aided design (CAD) tools have been developed to support the automatic generation of these specialized circuits. The resulting configurable computing system achieves a significant performance advantage over the existing solution, which is based on application specific integrated circuit (ASIC) technology.