Wavelet filter evaluation for image compression
IEEE Transactions on Image Processing
Entropy, counting, and programmable interconnect
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
DPGA utilization and application
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Sequencing run-time reconfigured hardware with software
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Configuration cloning: exploiting regularity in dynamic DSP architectures
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Design of Silicon IP Cores for Biorthogonal Wavelet Transforms
Journal of VLSI Signal Processing Systems - Special issue on signal processing systems design and implementation
Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey
Journal of VLSI Signal Processing Systems
Run-time reconfigurable systems for digital signal processing applications: a survey
Journal of VLSI Signal Processing Systems
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
High-performance automatic target recognition through data-specific VLSI
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Abstract: Video coding has been implemented by using rapid reconfiguration to time-share hardware for several sequential stages. This allows the number of gates to be reduced by a factor proportional to the number of coding stages at the expense of some reconfiguration overhead and the added memory and control needed to implement reconfiguration. The results of this work suggest that run-time reconfiguration is a powerful technique with potential for a wide range of applications in which temporal partitioning and adaptivity are feasible and desired.