Digital design: principles and practices (2nd ed.)
Digital design: principles and practices (2nd ed.)
Computer organization & design: the hardware/software interface
Computer organization & design: the hardware/software interface
Improving functional density through run-time constant propagation
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Introduction to data compression
Introduction to data compression
Implementation Approaches for Reconfigurable Logic Applications
FPL '95 Proceedings of the 5th International Workshop on Field-Programmable Logic and Applications
Optimizing FPGA-Based Vector Product Designs
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
IEEE Transactions on Information Theory
A Clocking Technique with Power Savings in Virtex-Based Pipelined Designs
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
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A reconfigurable scalar quantiser capable of accepting n-bit input data is presented. The data length n can be varied in the range 1 ... N - 1 under partial-run time reconfiguration, p-RTR. Issues as improvement in throughput using this reconfigurable quantiser of p-RTR against RTR for data of variable length are considered. The quantiser design referred to as the priority quantiser PQ is then compared against a direct design of the quantiser DIQ. It is then evaluated that for practical quantiser sizes, PQ shows better area usage when both are targeted onto the same FPGA. Other benefits are also identified.