Formal verification in hardware design: a survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automated Correctness Condition Generation for Formal Verification ofSynthesized RTL Designs
Formal Methods in System Design - Special issue on formal methods for computer-added design
Symbolic Functional Evaluation
TPHOLs '99 Proceedings of the 12th International Conference on Theorem Proving in Higher Order Logics
A Systematic Incrementalization Technique and Its Application to Hardware Design
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Hierarchical Verification Using an MDG-HOL Hybrid Tool
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
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