Supervisory control of a class of discrete event processes
SIAM Journal on Control and Optimization
Design and validation of computer protocols
Design and validation of computer protocols
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
ACM Transactions on Programming Languages and Systems (TOPLAS)
On the menbership problem for functional and multivalued dependencies in relational databases
ACM Transactions on Database Systems (TODS)
POPL '83 Proceedings of the 10th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Refining Model Checking by Abstract Interpretation
Automated Software Engineering
EDBT '92 Proceedings of the 3rd International Conference on Extending Database Technology: Advances in Database Technology
An Assume-Guarantee Rule for Checking Simulation
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
A Proof Technique for Rely/Guarantee Properties
Proceedings of the Fifth Conference on Foundations of Software Technology and Theoretical Computer Science
A Compositional Rule for Hardware Design Refinement
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Construction of Abstract State Graphs with PVS
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
MOCHA: Modularity in Model Checking
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Proving Deadlock Freedom in Component-Based Programming
FASE '01 Proceedings of the 4th International Conference on Fundamental Approaches to Software Engineering
Explicit Modeling of Influences, and of Their Absence, in Distributed Systems
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Automata-Theoretic Decision of Timed Games
VMCAI '02 Revised Papers from the Third International Workshop on Verification, Model Checking, and Abstract Interpretation
Exploiting Hierarchical Structure for Efficient Formal Verification
CONCUR '00 Proceedings of the 11th International Conference on Concurrency Theory
The Control of Synchronous Systems, Part II
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Local Proofs for Linear-Time Properties of Concurrent Programs
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
Towards Automatic Stability Analysis for Rely-Guarantee Proofs
VMCAI '09 Proceedings of the 10th International Conference on Verification, Model Checking, and Abstract Interpretation
Symbolic compositional verification by learning assumptions
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Modeling and Verification of Reactive Systems using Rebeca
Fundamenta Informaticae
Compositional verification and 3-valued abstractions join forces
SAS'07 Proceedings of the 14th international conference on Static Analysis
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Modular techniques for automatic verification attempt to overcome the state-explosion problem by exploiting the modular structure naturally present in many system designs. Unlike other tasks in the verification of finite-state systems, current modular techniques rely heavily on user guidance. In particular, the user is typically required to construct module abstractions that are neither too detailed as to render insufficient benefits in state exploration, nor too coarse as to invalidate the desired system properties. In this paper, we construct abstract modules automatically, using reachability and controllability information about the concrete modules. This allows us to leverage automatic verification techniques by applying them in layers: first we compute on the state spaces of system components, then we use the results for constructing abstractions, and finally we compute on the abstract state space of the system. Our experimental results indicate that if reachability and controllability information is used in the construction of abstractions, the resulting abstract modules are often significantly smaller than the concrete modules and can drastically reduce the space and time requirements for verification.