Formal methods: state of the art and future directions
ACM Computing Surveys (CSUR) - Special ACM 50th-anniversary issue: strategic directions in computing research
A refinement calculus for the synthesis of verified hardware descriptions in VHDL
ACM Transactions on Programming Languages and Systems (TOPLAS)
Formal verification in hardware design: a survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Register transfer level VHDL models without clocks
Proceedings of the conference on Design, automation and test in Europe
Denotational semantics of a behavioral subset of VHDL
Proceedings of the conference on Design, automation and test in Europe
Structural Operational Semantics for a Portable Subset of Behavioral VHDL-93
Formal Methods in System Design
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Evaluating possibilities for formally sound simulation and verification of VHDL
DCC'96 Proceedings of the 3rd international conference on Designing Correct Circuits
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