From Operational Semantics to Denotational Semantics for Verilog

Authors:
Zhu Huibiao;Jonathan P. Bowen;He Jifeng
Affiliations:
-;-;-
Venue:
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Year:
2001

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Abstract

This paper presents the derivation of a denotational semantics from an operational semantics for a subset of the widely used hardware description language Verilog. Our aim is to build an equivalence between the operational and denotational semantics. We propose a discrete time semantic model for Verilog. Algebraic laws are also investigated in this paper, with the ultimate aim of providing a unified set of semantic views for Verilog.