Synchronous programming with events and relations: the SIGNAL language and its semantics
Science of Computer Programming
The ESTEREL synchronous programming language: design, semantics, implementation
Science of Computer Programming
ACM Transactions on Programming Languages and Systems (TOPLAS)
Selected papers of the 3rd workshop on Concurrency and compositionality
ACM Transactions on Programming Languages and Systems (TOPLAS)
ACM Transactions on Programming Languages and Systems (TOPLAS)
Sequential synthesis using S1S
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Latch optimization in circuits generated from high-level descriptions
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Efficient latch optimization using exclusive sets
DAC '97 Proceedings of the 34th annual Design Automation Conference
Synchronous Programming of Reactive Systems
Synchronous Programming of Reactive Systems
Synchronous Observers and the Verification of Reactive Systems
AMAST '93 Proceedings of the Third International Conference on Methodology and Software Technology: Algebraic Methodology and Software Technology
A Complete Compositional Model Proof System for a Subset of CCS
Proceedings of the 12th Colloquium on Automata, Languages and Programming
On the Combination of Synchronous Languages
COMPOS'97 Revised Lectures from the International Symposium on Compositionality: The Significant Difference
Operational and Compositional Semantics of Synchronous Automaton Compositions
CONCUR '92 Proceedings of the Third International Conference on Concurrency Theory
Constructive Analysis of Cyclic Circuits
EDTC '96 Proceedings of the 1996 European conference on Design and Test
LICS '95 Proceedings of the 10th Annual IEEE Symposium on Logic in Computer Science
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We present a logical framework for the verification of synchronous networks in an assert-commit style. It is based on the known observation that the Hoare rule for sequential composition is sound and complete for parallel composition as well. The calculus we develop inside the framework is extremely simple, based on just one propositional tautology. Nevertheless, it is powerful enough to analyze the common proof strategies (monolithic, forward and backward) applied in automated verification of such networks. This analysis leads to an incremental verification method, based on successive construction of the weakest preconditions, in which the backward proof is driven by the property being verified. In the case of finite synchronous networks this construction can be carried out via simple manipulations on circuits, and circuit optimizers can be used incrementally to simplify the complexity of such backward proofs. The method should hopefully be applicable in verification of software synchronous systems, since the current compilers for synchronous languages generate quite redundant circuits.