Low-power digital systems based on adiabatic-switching principles
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Design and Evaluation of Adiabatic Arithmetic Units
Analog Integrated Circuits and Signal Processing - Special issue: analog design issues in digital VSLI circuits and systems
Power consumption in reversible logic addressed by a ramp voltage
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
| Hi-index | 0.00 |
In this communication adiabatic and conventional gates with a different fan-in are modeled and analytically compared. The comparison is carried out assuming both an assigned power supply and setting it to minimize power consumption. The analysis leads to simple expressions, which allow to understand how the power advantage of adiabatic logic changes by increasing the fan-in of the implemented gate. The analytical results were validated by means of Spice simulations using a 0.8 µm CMOS technology.