Tree automata, Mu-Calculus and determinacy
SFCS '91 Proceedings of the 32nd annual symposium on Foundations of computer science
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Checking that finite state concurrent programs satisfy their linear specification
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Communication and Concurrency
Fair Simulation Relations, Parity Games, and State Space Reduction for Büchi Automata
ICALP '01 Proceedings of the 28th International Colloquium on Automata, Languages and Programming,
Small Progress Measures for Solving Parity Games
STACS '00 Proceedings of the 17th Annual Symposium on Theoretical Aspects of Computer Science
CONCUR '97 Proceedings of the 8th International Conference on Concurrency Theory
CONCUR '00 Proceedings of the 11th International Conference on Concurrency Theory
Efficient Decision Procedures for Model Checking of Linear Time Logic Properties
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Efficient Büchi Automata from LTL Formulae
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Checking for Language Inclusion Using Simulation Preorders
CAV '91 Proceedings of the 3rd International Workshop on Computer Aided Verification
Reasoning about infinite computation paths
SFCS '83 Proceedings of the 24th Annual Symposium on Foundations of Computer Science
State Space Reductions for Alternating Büchi Automata
FST TCS '02 Proceedings of the 22nd Conference Kanpur on Foundations of Software Technology and Theoretical Computer Science
Applicability of fair simulation
Information and Computation
Simulation relations for alternating Büchi automata
Theoretical Computer Science
Simulating midlet's security claims with automata modulo theory
Proceedings of the third ACM SIGPLAN workshop on Programming languages and analysis for security
Applicability of fair simulation
Information and Computation
CIAA'03 Proceedings of the 8th international conference on Implementation and application of automata
Automata-theoretic model checking revisited
VMCAI'07 Proceedings of the 8th international conference on Verification, model checking, and abstract interpretation
The Büchi complementation saga
STACS'07 Proceedings of the 24th annual conference on Theoretical aspects of computer science
Enhancing simulation for checking language containment
TAMC'07 Proceedings of the 4th international conference on Theory and applications of models of computation
Efficient state space reduction for automata by fair simulation
FSEN'07 Proceedings of the 2007 international conference on Fundamentals of software engineering
A hybrid algorithm for LTL games
VMCAI'08 Proceedings of the 9th international conference on Verification, model checking, and abstract interpretation
Büchi automata can have smaller quotients
ICALP'11 Proceedings of the 38th international conference on Automata, languages and programming - Volume Part II
Minimizing generalized büchi automata
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
Complementation constructions for nondeterministic automata on infinite words
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Symbolic systems, explicit properties: on hybrid approaches for LTL symbolic model checking
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Simulation relations for alternating parity automata and parity games
DLT'06 Proceedings of the 10th international conference on Developments in Language Theory
Larger automata and less work for LTL model checking
SPIN'06 Proceedings of the 13th international conference on Model Checking Software
Advanced automata minimization
POPL '13 Proceedings of the 40th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
GOAL for games, omega-automata, and logics
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
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We present an algorithm for the minimization of B眉chi automata based on the notion of fair simulation introduced in [6] . Unlike direct simulation, fair simulation allows flexibility in the satisfaction of the acceptance conditions, and hence leads to larger relations. However, it is not always possible to remove edges to simulated states or merge simulation-equivalent states without altering the language of the automaton. Solutions proposed in the past consisted in checking sufficient conditions [11, Theorem 3], or resorting to more restrictive notions like delayed simulation [5]. By contrast, our algorithm exploits the full power of fair simulation by efficiently checking the correctness of changes to the automaton (both merging of states and removal of edges).