Model and Algorithm for Efficient Verification of High-Assurance Properties of Real-Time Systems
IEEE Transactions on Knowledge and Data Engineering
Efficient Verification of Timed Automata Using Dense and Discrete Time Semantics
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Automatic Abstraction for Verification of Timed Circuits and Systems
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Timed Trace Theoretic Verification Using Partial Order Reduction
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
The power of reachability testing for timed automata
Theoretical Computer Science
Compositional reachability analysis for efficient modular verification of asynchronous designs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
HSCC'05 Proceedings of the 8th international conference on Hybrid Systems: computation and control
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