A layout checking system for large scale integrated circuits

Authors:
K. Yoshida;M. Takashi;Y. Nakada;T. Chiva;K. Ogita
Affiliations:
NEC-Toshiba Information Systems Inc., Tokyo, Japan;NEC-Toshiba Information Systems Inc., Tokyo, Japan;Tokyo Shibaura Electric Co., Ltd., Kawasaki, 210 Japan;Tokyo Shibaura Electric Co., Ltd., Kawasaki, 210 Japan;NEC-Toshiba Information Systems Inc., Tokyo, Japan
Venue:
25 years of DAC Papers on Twenty-five years of electronic design automation
Year:
1988

Citing 3
Cited 0

Design rule checking and analysis of IC mask designs

DAC '76 Proceedings of the 13th Design Automation Conference
An artwork design verification system

DAC '75 Proceedings of the 12th Design Automation Conference
CRITIC - an integrated circuit design rule checking program

DAC '74 Proceedings of the 11th Design Automation Workshop

Quantified Score

Hi-index	0.00

Visualization

Abstract