Simulated annealing and Boltzmann machines: a stochastic approach to combinatorial optimization and neural computing
PVM: Parallel virtual machine: a users' guide and tutorial for networked parallel computing
PVM: Parallel virtual machine: a users' guide and tutorial for networked parallel computing
Synchronous and Asynchronous Parallel Simulated Annealing with Multiple Markov Chains
IEEE Transactions on Parallel and Distributed Systems
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Minimization of AND-EXOR Expressions Using Rewrite Rules
IEEE Transactions on Computers
Parallel Simulated Annealing Algorithms for Cell Placement on Hypercube Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Parallel Simulated Annealing using Speculative Computation
IEEE Transactions on Parallel and Distributed Systems
Evaluation of a Parallel Branch-and-Bound Algorithm on a Class of Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Parallel N-ary Speculative Computation of Simulated Annealing
IEEE Transactions on Parallel and Distributed Systems
Divide-and-Conquer for Parallel Processing
IEEE Transactions on Computers
Sympathy: fast exact minimization of fixed polarity Reed-Muller expressions for symmetric functions
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The implementation of switching functions by using the AND and EXOR primitives makes it possible to manufacture circuits which are easier and faster to test. This paper describes a parallel procedure that accelerates the execution of an AND-EXOR logic minimization procedure previously proposed. It is based on the use of Simulated Annealing (SA) and rewrite rules. The parallel procedure presented uses multiple Markov chains with periodic exchange of information to distribute the SA process, on which the sequential AND-EXOR minimization procedure is based.