Low-energy embedded FPGA structures
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
A survey of fast exponentiation methods
Journal of Algorithms
A High-Speed Small RSA Encryption LSI with Low Power Dissipation
ISW '97 Proceedings of the First International Workshop on Information Security
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m)
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Two secure and energy-saving spontaneous ad-hoc protocol for wireless mesh client networks
Journal of Network and Computer Applications
Customizable elliptic curve cryptosystems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
The ever increasing demand for security in portable, energyconstrained environments that lack a coherent security architecture has resulted in the need to provide energy efficient hardware that is algorithm agile. We demonstrate the feasibility of utilizing domain-specific reconfigurable processing for asymmetric cryptographic applications in order to satisfy these constraints. An architecture is proposed that is capable of implementing a full suite of finite field arithmetic over the integers modulo-N, binary Galois Fields, and non-supersingular elliptic curves over GF(2n), with operands ranging in size from 8 to 1024 bits. The performance and energy efficiency of the architecture are estimated via simulation and compared to existing solutions (e.g., software and FPGA's), yielding approximately two orders of magnitude reduction in energy consumption at comparable levels of performance and flexibility.