Communications of the ACM
Instruction systolic array—tradeoff between flexibility and speed
Computer Systems Science and Engineering
The connection machine
Given's rotation on an instruction array.
on Parcella '88: Fourth International Workshop on Parallel Processing by Cellular Automata and Arrays
Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories
SIGGRAPH '89 Proceedings of the 16th annual conference on Computer graphics and interactive techniques
Parallel volume visualization on a hypercube architecture
VVS '92 Proceedings of the 1992 workshop on Volume visualization
Interactive volume rendering on a multicomputer
I3D '92 Proceedings of the 1992 symposium on Interactive 3D graphics
Parallel volume-rendering algorithm performance on mesh-connected multicomputers
PRS '93 Proceedings of the 1993 symposium on Parallel rendering
Communication Costs for Parallel Volume-Rendering Algorithms
IEEE Computer Graphics and Applications
Cube-4—a scalable architecture for real-time volume rendering
Proceedings of the 1996 symposium on Volume visualization
PRS '97 Proceedings of the IEEE symposium on Parallel rendering
Introduction to volume rendering
Introduction to volume rendering
Morphological Hough Transform on the Instruction Systolic Array
Euro-Par '97 Proceedings of the Third International Euro-Par Conference on Parallel Processing
Fast solution of large N × N matrix equations in an MIMD-SIMD hybrid system
Parallel Computing - Special issue: Parallel and distributed scientific and engineering computing
Major line removal morphological hough transform on a hybrid system
Journal of Parallel and Distributed Computing
VLSI architecture design approaches for real-time video processing
WSEAS Transactions on Circuits and Systems
ICC'08 Proceedings of the 12th WSEAS international conference on Circuits
Parallelisation of sequence comparison algorithms using hybridised parallel techniques
HONET'09 Proceedings of the 6th international conference on High capacity optical networks and enabling technologies
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This paper describes a new parallel architectural system which we have called an MIMD-SIMD hybrid system. As the name implies, MIMD-SIMD hybrid system (also denoted as hybrid system in this paper) is a combination of both SIMD and MIMD systems working concurrently to produce an optimal architecture. This new parallel architecture has the capability of achieving speedup rates more than its corresponding MIMD architecture can achieve alone. We introduce our new SIMD concept and also show the contribution of the SIMD on this hybrid system. We have also developed a general formula for determining the speedup of the hybrid system so that accurate predictions can be made on the performance of the hybrid system. A MIMD-SIMD hybrid system was constructed and was used to implement on a visualization algorithm.