Characterizing processor architectures for programmable network interfaces
Proceedings of the 14th international conference on Supercomputing
NetBench: a benchmarking suite for network processors
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
CommBench-a telecommunications benchmark for network processors
ISPASS '00 Proceedings of the 2000 IEEE International Symposium on Performance Analysis of Systems and Software
Achieving 100% throughput in an input-queued switch
INFOCOM'96 Proceedings of the Fifteenth annual joint conference of the IEEE computer and communications societies conference on The conference on computer communications - Volume 1
Technologies and building blocks for fast packet forwarding
IEEE Communications Magazine
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This paper intends to explore the demands put on Network Processors by evaluating their claim to address adequately the needs of Broadband Integrated Services Digital Networks, based on variable length packet communication.It starts by giving an overview of the elementary functions that are seen as essential capabilities to cover the broadening spectrum of packet communication applications.Besides functionality, performance is also critical in modern packet-based communication networks, not only for performing the elementary functions in isolation, but particularly for combinations of functions, to be executed by a Network Processor in the presence of live traffic, in a true contemporary network environment.The discussion of the requirements imposed by the external world is complemented by a brief overview of needs forthcoming from inter-working with another technologically demanding part of a packet network node: the switch fabric.Requirements for functionality and performance are one thing. The capability to meet them is another. The third part of the paper will discuss the strengths and weaknesses of some possible Network Processor architectures, when trying to meet these requirements. Aspects like packet classification, packet editing, data store access, packet scheduling and packet segmentation and re-assembly for cell-based switch fabrics will be addressed.