Buffer size optimization for full-search block matching algorithms

Authors:
Yuan-Hau Yeh;Chen-Yi Lee
Affiliations:
-;-
Venue:
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Year:
1997

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Abstract

This paper presents how to find optimized buffer size for VLSI architectures of full-search block matching algorithms. Starting from the DG (dependency graph) analysis, we focus in the problem of reducing the internal buffer size under minimal I/O bandwidth constraint. As a result, a systematic design procedure for buffer optimization is derived to reduce realization cost.