Approximate algorithms for time separation of events
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Transformations for the synthesis and optimization of asynchronous distributed control
Proceedings of the 38th annual Design Automation Conference
Performance Analysis of Asynchronous Circuits Using Markov Chains
Concurrency and Hardware Design, Advances in Petri Nets
Asynchronous Microengines for Efficient High-level Control
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
Design of a cell library for asynchronous microengines
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
A fast, energy-efficient z-comparator
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware
Efficient performance analysis of asynchronous systems based on periodicity
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Loop pipelining for high-throughput stream computation using self-timed rings
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Process variation-aware performance analysis of asynchronous circuits
Microelectronics Journal
PATMOS'09 Proceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
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This paper describes the design and verification of a high-performance asynchronous differential equation solver. The design has low control overhead which allows the average-case delay to be 48% faster (tested at 22 degree C and 3.3V) than any comparable synchronous design (simulated at 100 degree C and 3V. The techniques to reduce completion sensing overhead and hide control overhead at the circuit, architectural, and protocol levels are discussed. In addition, symbolic model checking techniques are described that were used to gain higher confidence in the correctness of the timed distributed control.