Design of a cell library for asynchronous microengines

  • Authors:
  • Gaurav Gulati;Erik Brunvand

  • Affiliations:
  • University of Utah, Salt Lake City, Utah;University of Utah, Salt Lake City, Utah

  • Venue:
  • GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
  • Year:
  • 2005

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Abstract

Asynchronous microengines are an attractive alternative to globally synchronous systems for the realization of high performance programmable controllers. However, because of the specific demands of asynchronous signaling, it is not always easy to use existing standard cell libraries to implement asynchronous microengines. In this paper we present the design and evaluation of a CMOS cell set that augments a generic cell library with cells specific to the design of asynchronous microengines. These cells encapsulate behavior and timing information critical to the implementation of asynchronous microengine controllers. These special purpose cells result in higher performance circuits, and in a significant reduction in design time over a generic library. To validate the library, the control path of a popular asynchronous controller benchmark has been designed and fabricated through MOSIS.