Delay-insensitive interface specification and synthesis
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A Programming Approach to the Design of Asynchronous Logic Blocks
Concurrency and Hardware Design, Advances in Petri Nets
Analysis and Applications of the XDI model
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Verification and implementation of delay-insensitive processes in restrictive environments
Fundamenta Informaticae - Special issue on application of concurrency to system design (ACSD'04)
Verification and Implementation of Delay-Insensitive Processes in Restrictive Environments
Fundamenta Informaticae - APPLICATION OF CONCURRENCY TO SYSTEM DESIGN (ACSD'04)
| Hi-index | 0.00 |
Numerous formalisms exist to specify delay-insensitive computations and their implementations. It is not always straightforward to compare specifications in the different formalisms. One way of comparing specifications is transforming them to automata in which nodes are annotated with progress requirements. In this paper we present an algorithm that transforms DI-algebra recursive process expressions into finite automata. In doing so we develop an operational semantics for DI-algebra. The algorithm has been proven correct, and we highlight the most interesting aspects of that proof. The algorithm has been implemented and turns out to be very valuable in the process of getting a specification right.