CNF satisfiability test by counting and polynomial average time
SIAM Journal on Computing
The Transduction Method-Design of Logic Networks Based on Permissible Functions
IEEE Transactions on Computers
Random generation of test instances for logic optimizers
DAC '94 Proceedings of the 31st annual Design Automation Conference
The Complexity of Computing
Performance test of local search algorithms using new types of random CNF formulas
IJCAI'95 Proceedings of the 14th international joint conference on Artificial intelligence - Volume 1
Towards synthetic benchmark circuits for evaluating timing-driven CAD tools
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Transformation rules for designing CNOT-based quantum circuits
Proceedings of the 39th annual Design Automation Conference
Transformation rules for CNOT-based quantum circuits and their applications
New Generation Computing - Quantum computing
Evolution of synthetic RTL benchmark circuits with predefined testability
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Two major improvements, controlled fan-in and automated initial-circuit production, were made over the random generator of benchmark circuits presented at DAC'94. This is an important progress towards our goal of random benchmarking: more general and secure testing, increasing the naturality of random circuits by controlling their attributes, and obtaining test results by which the difference of performances under evaluation can be made clear.