Practical concurrent ASIC and system design and verification

Authors:
I. Gibson;C. Amies
Affiliations:
Canon Information Systems Research Australia, PO Box 313, North Ryde, NSW 2113, AUSTRALIA;Canon Information Systems Research Australia, PO Box 313, North Ryde, NSW 2113, AUSTRALIA
Venue:
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Year:
1997

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Abstract

This paper describes the evolution of a design and verification methodology successfully used to develop advanced ASICs as components of multiple new commercial products. The ASICs are typically large, high speed, algorithmically complex and implement novel functionality. The ASIC development process is driven by the commercial pressures of low cost and short schedules of multiple projects. It is carried out using a team of designers of varying experience including new staff. The dual emphasis of our methodology is maintaining fine control over the design and verification process, together with full independent cross verification as an integral part of the entire ASIC and system development process.