Low Cost Concurrent Test Implementation for Linear Digital Systems

Authors:
Ismet Bayraktaroglu;Alex Orailoglu
Affiliations:
-;-
Venue:
ETW '00 Proceedings of the IEEE European Test Workshop
Year:
2000

Citing 5
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Abstract

An implementation of a low-cost, time-extended invariant-based concurrent test scheme for linear digital systems is presented. Both feedback and non-feedback systems are analyzed to identify gate and RT level implementation requirements for high on-line fault coverage. Simulation results on implementations satisfying the outlined requirements indicate that low latency, 100% on-line fault coverage is attained within hardware costs comparable to those of scan insertion.