A new integrated system for PLA testing and verification

Authors:
Fabio Somenzi;Silvano Gai;Marco Mezzalama;Paolo Prinetto
Affiliations:
SGS ATES, Componenti ELETTRONICI, Central R & D, Via Olivetti 2, 20141 AGRATE BRIANZA (Mi), ITALY;Politecnico di Torino, Dipartimento di Automatica e Informatica, Centre Elaborazione Numerale dei Segnali, Corso Duca degli Abruzzi 24, 10129 TORINO, ITALY;Politecnico di Torino, Dipartimento di Automatica e Informatica, Centre Elaborazione Numerale dei Segnali, Corso Duca degli Abruzzi 24, 10129 TORINO, ITALY;Politecnico di Torino, Dipartimento di Automatica e Informatica, Centre Elaborazione Numerale dei Segnali, Corso Duca degli Abruzzi 24, 10129 TORINO, ITALY
Venue:
DAC '83 Proceedings of the 20th Design Automation Conference
Year:
1983

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Abstract

PART is a system for PLA testing and verification, intended to be properly interfaced with other existing tools to generate a comprehensive design environment. To this purpose, it provides several facilities, among which the capability of generating fault population on the basis of layout information. PART aims at producing a very compact test set for all detectable crosspoint defects, using limited amounts of run time and storage. This is achieved by means of an efficient partitioning algorithm together with powerful heuristics. Test minimality is ensured by a simple procedure. In the present paper these are discussed, experimental results are given and a comparison with competing strategies is made.