Computer Interconnection Structures: Taxonomy, Characteristics, and Examples
ACM Computing Surveys (CSUR)
Guest Editorial: An Overview of Parallel Processors and Processing
ACM Computing Surveys (CSUR)
Classification Categories and Historical Development of Circuit Switching Topologies
ACM Computing Surveys (CSUR)
The shuffle/exchange-plus networks
ACM-SE 20 Proceedings of the 20th annual Southeast regional conference
A pipelined pseudoparallel system architecture for motion analysis
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Fault tolerance of a class of connecting networks
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
The Reverse-Exchange Interconnection Network
IEEE Transactions on Computers
A Pipelined Pseudoparallel System Architecture for Real-Time Dynamic Scene Analysis
IEEE Transactions on Computers
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This paper describes an asynchronous circuit switching network for multiple-processor systems. Several circuit switching networks for various applications have been proposed and constructed. However, there are problems associated with these networks. The asynchronous circuit switching network possesses several features that can solve these problems. A three-stage fully connected topology is utilized to construct the network. Each switching element is functionally and physically identical and this facilitates a cost-effective LSI implementation and software development. The control structure of the switching element and the routing algorithm are re-organized to fit the asynchronous operation. The network takes advantage of low-cost microcomputers to do the distributed routing control and to implement the communication protocols. The graceful degradation characteristic in the network is provided by independent multiple paths existing between any pair of the source and the destination. A network monitor is incorporated to facilitate an adaptive routing strategy and to have the fault diagnostic capability. Three alternatives for the switching element implementation are described to demonstrate the hardware and software tradeoffs.