Multi-defect real time diagnosis using a single pin probe
DAC '76 Proceedings of the 13th Design Automation Conference
Real time diagnosis of logic assemblies
DAC '70 Proceedings of the 7th Design Automation Workshop
Real time diagnosis using single pin probe
DAC '75 Proceedings of the 12th Design Automation Conference
Introduction to an LSI test system
DAC '77 Proceedings of the 14th Design Automation Conference
A logic design structure for LSI testability
DAC '77 Proceedings of the 14th Design Automation Conference
Test generation for large logic networks
DAC '77 Proceedings of the 14th Design Automation Conference
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This paper proposes a testing and diagnostic method that reduces fault location and repair costs on printed circuit boards populated with LSI and VLSI modules. The method requires some additional circuitry on the module subassembly. It enhances the following test strategies: automatic probing, bed-of-nails, Subassembly-in-Place, and Level Sensitive to Scan Design (LSSD). In addition, this technique makes it possible to partition large networks into manageable subnetworks for Automatic Test Generation.