On Approximation Methods for the Assignment Problem
Journal of the ACM (JACM)
A proper model for the partitioning of electrical circuits
DAC '72 Proceedings of the 9th Design Automation Workshop
A simple, efficient design automation processor
DAC '74 Proceedings of the 11th Design Automation Workshop
On the use of the linear assignment algorithm in module placement
25 years of DAC Papers on Twenty-five years of electronic design automation
A placement technique based on minimization and even distribution of crossovers
ACM SIGDA Newsletter
On the use of the linear assignment algorithm in module placement
DAC '81 Proceedings of the 18th Design Automation Conference
A class of min-cut placement algorithms
DAC '77 Proceedings of the 14th Design Automation Conference
A two-dimensional placement algorithm for the master slice LSI layout problem
DAC '79 Proceedings of the 16th Design Automation Conference
An efficient heuristic for standard-cell placement
Integration, the VLSI Journal
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In [1] a physical design automation system with a unified approach to physical layout techniques was presented. This method has been extended so that it now is an iterated, assignment placement algorithm which improves the placements reported last year. The problems to be addressed in this paper are those of assignment, placement, and spanning. Assignment is the process of assigning logical elements to integrated circuit chips. Placement is the process of placing integrated circuits on a board. Spanning is the process of converting a set of points which must be connected, to a wire list specifying the manner of connection. There are a number of criteria used to span. In this application, we have the option to use either Kruskal's spanning algorithm [2] or a chaining spanner [3]. The goal of these two processes is to increase the routability of the resulting board, which is often measured by the overall length of wire required (Manhattan distance).