Automatic test generation for large digital circuits

Authors:
Akihiko Yamada;Nobuo Wakatsuki;Hideo Shibano;Osamu Itoh;Kyouji Tomita;Shigehiro Funatsu
Affiliations:
-;-;-;-;-;-
Venue:
DAC '77 Proceedings of the 14th Design Automation Conference
Year:
1977

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Abstract

This paper describes an implemented technique of automatic test generation for large digital circuits. The test generator presented in this paper basically uses the path sensitizing method and is applicable to all kinds of logical circuits. Some application results are also described.