Generating mixing hardware/software systems from SDL specifications
Proceedings of the ninth international symposium on Hardware/software codesign
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Hardware/Software Codesign and Rapid Prototyping of Embedded Systems
IEEE Design & Test
Scenario-Based Performance Evaluation of SDL/MSC-Specified Systems
Performance Engineering, State of the Art and Current Trends
Transformation of SDL specifications for system-level timing analysis
Proceedings of the tenth international symposium on Hardware/software codesign
Hardware synthesis from coarse-grained dataflow specification for fast HW/SW cosynthesis
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Optimized RTL Code Generation from Coarse-Grain Dataflow Specification for Fast HW/SW Cosynthesis
Journal of Signal Processing Systems
Proceedings of the 1st international conference on Simulation tools and techniques for communications, networks and systems & workshops
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SDL is currently gaining interest as a system level specification language for HW/SW codesign. Automated synthesis of SDL in hardware so far had problems with its efficiency. The investigations on the resource usage of SDL-to-VHDL designs presented in this paper identify two key challenges: minimizing the overhead introduced by SDL process infrastructure, and choosing the appropriate synthesis method. This paper presents a framework for SDL hardware synthesis where VHDL code generation, high-level synthesis and RT-level synthesis are combined. A configurable run-time environment implements services like data handling and message passing in efficient, hand-coded library components, which take into account properties of the target architecture. For these components RT-level synthesis was found to be suitable. The behavior of each SDL process on the other hand is freely specified by the system designer. Depending on the type of application, i.e. complex data-oriented or control-oriented, either high-level synthesis, RT-level synthesis, or a combination of both can prove to be optimal.