Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
An Integrated Approach for Analog Ciruit Testing with a Minmum Number of Detected Parameters
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
Test synthesis for DC test of switched-capacitors circuits
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Digital detection of analog parametric faults in SC filters
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Test synthesis for DC test of switched-capacitors circuits
EDTC '97 Proceedings of the 1997 European conference on Design and Test
A Path Sensitization Technique for Testing of Switched Capacitor Circuits
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
A 0.8 μm CMOS switched-capacitor video filter
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Built-In-Self-Testing Techniques for Programmable Capacitor Arrays
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Efficient Parametric Fault Detection in Switched-Capacitor Filters
IEEE Design & Test
A 0.8 µm CMOS testable switched-capacitor filter for video frequency applications
Analog Integrated Circuits and Signal Processing
Built-In-Self-Testing Techniques for Programmable Capacitor Arrays
Journal of Electronic Testing: Theory and Applications
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This paper presents a DFT/BIST technique for switched-capacitor (SC) circuits that consists of measuring all capacitance ratios of transfer functions in the DC domain. Then, the specifications of a SC circuit are computed from these measured capacitance ratios and compared to the fault-free ones. Moreover, a maximal fault diagnosis is realized for the capacitances. This test technique uses re-configur