ESIM: A Multimodel Design Error and Fault Simulator for Logic Circuits

Authors:
Hussain Al-Asaad;John P. Hayes
Affiliations:
-;-
Venue:
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
Year:
2000

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Abstract

ESIM is a simulation tool that integrates logic fault and design error simulation for logic circuits. It targets several design error and fault models, and uses a novel mix of simulation algorithms based on parallel-pattern evaluation, multiple error activation, single fault propagation, and critical path tracing. Several experiments are discussed to demonstrate the power of ESIM.