The NUMAchine Multiprocessor

  • Authors:
  • R. Grindley;T. Abdelrahman;S. Brown;S. Caranci;D. DeVries;B. Gamsa;A. Grbic;M. Gusat;R. Ho;O. Krieger;G. Lemieux;K. Loveless;N. Manjikian;P. McHardy;S. Srbljic;M. Stumm;Z. Vranesic;Z. Zilic

  • Affiliations:
  • -;-;-;-;-;-;-;-;-;-;-;-;-;-;-;-;-;-

  • Venue:
  • ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
  • Year:
  • 2000

Quantified Score

Hi-index 0.00

Visualization

Abstract

Small-scale multiprocessors are becoming increasingly economical and common, whereas larger multiprocessors continue to have higher per-node costs. The NUMAchine multiprocessor project seeks to make large-scale multiprocessors more economical while maintaining high performance by exploring architectural and hardware features for low-cost, modular multiprocessors. To demonstrate our approach, we have implemented a prototype system that is scalable to 128 processors. An efficient directory-based cache coherence protocol exploits our hierarchical ring-based interconnect and supports sequential consistency. This paper documents the design choices and the resulting performance of the system using both simulation results and measurements on the prototype hardware.